| 引用本文: | 刘井密,李彦,杨贵.智能变电站过程层交换机延时测量方案设计[J].电力系统保护与控制,2015,43(10):111-115. |
| LIU Jingmi,LI Yan,YANG Gui.Design of delay measurement switch in intelligent substation process level[J].Power System Protection and Control,2015,43(10):111-115 |
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| 摘要: |
| 智能变电站过程层网络SMV报文组网的传输方式已成为一种趋势。SMV报文组网的传输方式具有信息共享便捷的优势，但是SMV报文在网络交换设备交换机中传输的延时具有不确定性，这样就需要可靠的时钟源来进行同步，而且合并单元需要具备一定的守时能力。为了使SMV报文组网的传输方式不依赖外部时钟源，尝试对交换机进行改进，给出了一种基于FPGA的过程层SMV报文传输延时可测的交换机架构，提出了一种利用IEC 61850-9-2帧结构中Reserved字段测量并记录传输延时的方案。经过验证，该架构和方案可以准确地测量SMV报文在网络中传输的延时。 |
| 关键词: 智能变电站 交换机 过程层 SMV(Sampled Measured Value) IEC 61850-9-2 传输延时测量 FPGA |
| DOI：10.7667/j.issn.1674-3415.2015.10.018 |
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| Design of delay measurement switch in intelligent substation process level |
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LIU Jingmi, LI Yan, YANG Gui
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NR Electric Co., Ltd., Nanjing 211100, China
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| Abstract: |
| Constructing SMV network of intelligent substation process layer with switches has been becoming a fashion. This structure is convenient to share information among multiple devices, but it leads to uncertainty and indeterminacy in terms of time delay when transmitting in the network. This drawback requires a reliable time resource to realize synchronization, and the merging unit should have the ability of time keeping to a certain degree. To solve these problems, this paper gives a structure of switch based on FPGA aiming to measure the time delay of SMV packets transmission, and proposes a scheme of measuring and storing the time delay using the reserved bytes in IEC 61850-9-2 frame. FPGA realization and experiments justify the proposed structure and scheme of the time delay measurement. |
| Key words: intelligent substation switch process layer sampled measured value (SMV) IEC 61850-9-2 delay measurement FPGA |
